1. Technical Field
The present invention relates generally to fabrication of high density electronic packages and more particularly, to a method for replacing defective chips in a multichip module of an electronic package without disassembling the module or varying the module's interconnect footprint.
2. Background Art
In recent years, electronic packages composed of multiple laminated semiconductor chips (or layers containing integrated circuitry) have become popular due to their decreased volume and improved signal propagation speed. An example of such high density electronic packaging is found in U.S. Pat. No. 4,983,533, entitled "High-Density Electronic Modules-Process & Product," by Tiong C. Go.
A typical high density electronic package includes a module and interconnected supporting substrate. The module comprises a stack of integrated circuit layers bonded together. Each layer can contain one or more semiconductor chips. An interconnect metallization pattern is provided on an access surface of the module for electrical connection to the supporting substrate. The metallization pattern may include both individual contacts and bussed contacts. The metallization pattern of the module is positioned opposite a complementary interconnect pattern of the supporting substrate. Contacts of the interconnect metallization pattern on the module are typically bump bonded to complementary terminals of the interconnect pattern on the substrate. The bump bonding establishes a secure mechanical and electrical interconnection between the module and substrate of the electronic package. The substrate typically provides the package's interface to other assemblies.
While such high density electronic packaging provides significant improvements in volume and speed, utility is curtailed if one or more of the chips contained therein is defective. One prior art technique for repair of such a faulty package involves physically removing the defective chip or layer from the module and replacing it with a spare. Such a repair technique is disclosed in U.S. Pat. No. 5,019,946, entitled "High Density Interconnect with High Volumetric Efficiency." According to this earlier repair method, chips that are adhesively bonded together in a stack (module) are heated to the point where the adhesive softens enough to remove the defective chip. A good chip is then inserted and the interconnect metallization pattern on the stack is reapplied. The same general repair method is disclosed for use on a stack held together in a frame, except that the frame is dismantled to allow removal of the defective chip.
U.S. Pat. No. 4,983,533 discloses another method of repair for an electronic package. This technique employs redundant chips in the module. The module is formed with redundant chips and a pattern of metal connector contacts is applied on an access surface of the module to mate with a special customizable metal pattern on the substrate. The substrate's special metal pattern includes a separate chip conductor for connection to each chip, an interlinking conductor interconnecting the chip conductors and a reduced number of conductors leading from the interlinking conductor to external circuitry. If a defective chip is found, the defective chip's connector contacts and leads attached thereto on the access surface of the module are removed. Also, portions of the interlinking conductor on the substrate are removed to isolate the defective chip from the external circuitry and to connect the remaining nondefective chips and the redundant chips to the external circuitry. This repair approach thus necessitates altering the original metal pattern both on the access surface of the module and on the substrate when a defective chip is detected.
Thus, while the prior art does allow for repair of such high density electronic packaging, it does not do so on an efficient basis. Supporting substrates are generally earmarked for particular packages. Any custom changes to the metal pattern on the substrate are highly inefficient in terms of manufacturing resources. Further, the problem remains that repair of the module requires changes to the metallization pattern on the access surface of the module or dismantling of the module and handling of individual layers or chips. A need thus exists for a repair method that does not involve the dismantling of the module, the alteration of the module's interconnect pattern, or any changes to the supporting substrate.